Hardware systems and semiconductor intellectual properties (IP) may need to exchange information between non-coherent and coherent systems. They also logically operate on addresses at multiple points to distinguish between memory regions. In a coherent system, non-coherent transactions received from a non-coherent subsystem need to be translated into one or more coherent transactions that are subsequently issued to a coherent subsystem. Therefore, what is needed is a system and method to translate non-coherent transactions, which are received from a non-coherent subsystem, into one or more coherent transactions issued to a coherent subsystem.